Administered jointly by ACM and IEEE Computer Society. The award of $5000 is given for contributions to computer and digital systems architecture where the field of computer architecture is considered at present to encompass the combined hardware-software design and analysis of computing and digital systems.

Previous winners

2017: Thacker, Charles P. “Chuck”

For pioneering contributions to the design and development of personal computer architecture including the Xerox Alto, the first tablet computers, and cache coherence protocols.

2016: Weiser, Uri C.

For leadership and pioneering industry and academic work in high performance processors and multimedia architectures.

2015: Jouppi, Norman

For pioneering contributions to the design and analysis of high-performance processors and memory systems.

2014: Mudge, Trevor

For pioneering contributions to low power computer architecture and its interaction with technology.

2013: Goodman, James

For pioneering contributions to the architecture of shared-memory multiprocessors.

2012: Avizienis, Algirdas

For fundamental contributions to fault-tolerant computer architecture and computer arithmetic.

2011: Sohi, Gurindar S.

For pioneering widely used micro-architectural techniques for instruction-level parallelism.

2010: Dally, William J.

For outstanding contributions to the architecture of interconnection networks and parallel computers.

2009: Emer, Joel

For pioneering contributions to performance analysis and modeling methodologies; for design innovations in several significant industry microprocessors; and for deftly bridging research and development, academia and industry.

2008: Patterson, David

For seminal contributions to RISC microprocessor architectures, RAID storage systems design, and reliable computing, and for leadership in education and in disseminating academic research results into successful industrial products.

2007: Valero, Mateo

For extraordinary leadership in building a world class computer architecture research center, for seminal contributions in the areas of vector computing and multithreading, and for pioneering basic new approaches to instruction-level parallelism.

2006: Pomerene, James H.

For pioneering innovations in computer architecture, including early concepts in cache, reliable memories, pipelining and branch prediction, for the design of the IAS computer and for the design of the Harvest supercomputer.

2005: Colwell, Robert P.

For outstanding achievements in the design and implementation of industry-changing micro-architectures, and for significant contributions to the RISC/CISC architecture debate.

2004: Brooks, Frederick

For the definition of computer architecture and contributions to the concept of computer families and to the principles of instruction set design; for seminal contributions in instruction sequencing, including interrupt systems and execute instructions; and for contributions to the IBM 360 instruction set architecture.

2003: Fisher, Joseph A. (Josh)

In recognition of 25 years of seminal contributions to instruction-level parallelism, pioneering work on VLIW architectures, and the formulation of the Trace Scheduling compilation technique.

2002: Rau, Bantwal R.

For pioneering contributions to statically-scheduled instruction-level parallel processors and their compilers.

2001: Hennessy, John L.

For being the founder and chief architect of the MIPS Computer Systems and contributing to the development of the landmark MIPS R2000 microprocessor.

2000: Davidson, Edward

For seminal contributions to the design, implementation, and performance evaluation of high performance pipelines and multiprocessor systems.

1999: Smith, James E.

For fundamental contributions to high performance micro-architecture, including saturating counters for branch prediction, reorder buffers for precise exceptions, decoupled access/execute architectures, and vector supercomputer organization memory, and interconnects.

1998: Watanabe, Tadashi

For contributions to the architectural design of supercomputers with multiple/parallel vector pipelines and programmable vector caches.

1997: Tomasulo, Robert

For the ingenious Tomasulo’s algorithm, which enabled out-of-order execution processors to be implemented.

1996: Patt, Yale N.

For important contributions to instruction level parallelism and superscalar processor design.

1995: Crawford, John

In recognition of your impact on the computer industry through your development of microprocessor technology.

1994: Thornton, James E.

For his pioneering work on high performance processors; for inventing the scoreboard for instruction issue; and for fundamental contributions to vector supercomputing.

1993: Kuck, David J.

For his impact on the field of supercomputing, including his work in shared memory multiprocessing, clustered memory hierarchies, compiler technology, and application/library tuning.

1992: Flynn, Michael J.

For his important and seminal contributions to processor organization and classification, computer arithmetic and performance evaluation.

1991: Smith, Burton

For pioneering work in the design and implementation of scalable shared memory multiprocessors.

1990: Batcher, Kenneth E.

For contributions to parallel computer architecture, both for pioneering theories in interconnection networks and for the pioneering implementations of parallel computers.

1989: Cray, Seymour

For a career of achievements that have advanced supercomputer design.

1988: Siewiorek, Daniel

For outstanding contributions in parallel computer architecture, reliability, and computer architecture education.

1987: Amdahl, Gene M.

For outstanding innovations in computer architecture, including pipelining, instruction look- ahead and cache memory.

1986: Cragon, Harvey G.

For major contributions to computer architecture and for pioneering the application of integrated circuits for computer purposes and for serving as architect of the Texas Instruments scientific computer and for playing a leading role in many other computing developments in that company.

1985: Cocke, John

For contributions to high performance computer architecture through look ahead, parallelism and pipeline utilization, and to reduced instruction set computer architecture through the exploitation of hardware-software tradeoffs and compiler optimization.

1984: Dennis, Jack

1983: Kilburn, Tom

1982: Bell, C. Gordon

1981: Clark, Wesley A.

1980: Wilkes, Maurice V.

1979: Barton, Robert S.