The ACM SIGARCH and IEEE-CS TCCA ISCA Influential Paper Award will be presented annually at the International Symposium on Computer Architecture. This award recognizes the paper from the ISCA Proceedings 15 years earlier that has had the most impact on the field (in terms of research, development, products or ideas) during the intervening years.
The award includes an honorarium of $1,000 for the author(s) and a certificate.
Selection process
Candidate papers for the award will be selected by the current year’s ISCA Program Committee, with the final selection to be made by a committee consisting of the ISCA Program Chair, the SIGARCH Chair, and the TCCA Chair.
Previous winners
2020 (For ISCA 2005): Rakesh Kumar, Victor V. Zyuban, Dean M. Tullsen
Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling.
2019 (For ISCA 2004): Lance Hammond, Vicky Wong, Mike Chen, Brian D. Carlstrom, John D. Davis, Ben Hertzberg, Manohar K. Prabhu, Honggo Wijaya, Christos Kozyrakis, Kunle Olukotun
Transactional Memory Coherence and Consistency.
2018 (For ISCA 2003): Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan and David Tarjan
Temperature-aware microarchitecture.
2017 (For ISCA 2002): Kris Flautner, Nam Sung Kim, Steve Martin, David Blaauw and Trevor Mudge
Drowsy Caches: Simple Techniques for Reducing Leakage Power.
2016 (For ISCA 2001): Brian Fields, Shai Rubin, Rastislav Bodík
Focusing processor policies via critical-path prediction.
2015 (For ISCA 2000): David Brooks, Vivek Tiwari, Margaret Martonosi
Wattch: A Framework for Architectural-Level Power Analysis and Optimizations.
2014 (For ISCA 1999): Seth Copen Goldstein, Herman Schmit, Matthew Moe, Mihai Budiu, Srihari Cadambi, R. Reed Taylor, Ronald Laufer
PipeRench: A Coprocessor for Streaming Multimedia Acceleration.
2013 (For ISCA 1998): Srilatha Manne, Artur Klauser, Dirk Grunwald
Pipeline Gating: Speculation Control for Energy Reduction.
2012 (For ISCA 1997): Subbarao Palacharla, Norman P. Jouppi, James E. Smith
Complexity-Effective Superscalar Processors.
2011 (For ISCA 1996): Dean M. Tullsen, Susan J. Eggers, Joel S. Emer, Henry M. Levy, Jack L. Lo, Rebecca L. Stamm
Exploiting choice: instruction fetch and issue on an implementable simultaneous multithreading processor.
2010 (For ISCA 1995): Dean M. Tullsen, Susan J. Eggers, Henry M. Levy
Simultaneous Multithreading: Maximizing On-Chip Parallelism.
2009 (for ISCA 1994): Jeffrey Kuskin, David Ofelt, Mark Heinrich, John Heinlein, Richard Simoni, Kourosh Gharachorloo, John Chapin, David Nakahira, Joel Baxter, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John Hennessy
The Stanford FLASH multiprocessor.
2008 (for ISCA 1993): Maurice Herlihy, J. Eliot B. Moss
Transactional memory: architectural support for lock-free data structures.
2007 (for ISCA 1992): Tse-Yu Yeh, Yale N. Patt
Alternative Implementations of Two-Level Adaptive Branch Prediction.
2006 (for ISCA 1991): Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Nancy J. Warter, Wen-mei W. Hwu
IMPACT: an architectural framework for multiple-instruction-issue processors.
2005 (for ISCA 1990): Norman P. Jouppi
Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers.
2004 (for ISCA 1989): Steven Przybylski, John Hennessy, Mark Horowitz
Characteristics of Performance-Optimal Multi-Level Cache Hierarchies.
2003 (for ISCA 1988): Jean-Loup Baer, Wen-Hann Wang
On the inclusion properties for multi-level cache hierarchies.