———————————————————————————————-
ISC High Performance EESP Workshop 2026: CALL FOR PAPERS
———————————————————————————————-
2nd International Workshop on “Energy Efficiency with Sustainable Performance: Techniques, Tools, and Best Practices”
In conjunction with ISC High Performance 2026, Hamburg, Germany
Submission extended deadline ——————- March 20, 2026, AoE (firm)
Authors notification ——————— April 14, 2026, AoE
Camera-ready deadline ————— May 26, 2026, AoE
Workshop ——————————— June 26, 2026
Workshop website: https://ayeshaafzal91.github.io/eesp
Submission via ISC Linklings system: https://go-nhr.de/ISC26-EESP
Objective
———————————-
The EESP workshop fosters the exchange of innovative strategies, tools, and best practices to enhance energy efficiency in modern computing environments. With rising energy costs, increasing CO2 emissions, and mounting pressure on power infrastructure, optimizing energy use has become a crucial priority for sustainable computing infrastructure. EESP workshop explores how to optimize computing environments by effectively balancing performance, power consumption, and sustainability trade-offs. It will provide participants a comprehensive guidebook featuring strategies tailored for exascale, Tier-1 and Tier-2 supercomputing centers. By learning about how to adopt greener, cost-effective, and energy-efficient practices, attendees will gain a competitive edge in driving sustainability across their systems. Aligned with the Sustainable Development Goals, the workshop encourages collaboration between HPC and AI communities to promote environmentally responsible innovation. It will provide guidance for system operators and facility managers on reducing Power Usage Effectiveness and sourcing green energy, while supporting users in making energy-conscious decisions through thoughtful experiment design. The workshop also emphasizes full-lifecycle sustainability — from system design and operations to reuse and decommissioning — and considers how HPC strategies can support energy-efficient AI infrastructure amid growing convergence. While current tenders often emphasize raw hardware metrics, this workshop highlights the importance of sustained (application) performance, rather than peak performance, as a critical metric for long-term success.
Scope
———————————-
EESP invites academia, supercomputing centers, industry, national laboratories, and policymakers to collaborate on advancing energy-efficient practices. To achieve end-to-end visibility and adaptability in energy usage, EESP emphasizes cross-layer innovation, encompassing advances in hardware, software, runtime systems and system-application co-design. This includes data-driven analytics and monitoring, energy-efficient methodologies, operational case studies, benchmarking frameworks, AI–HPC convergence, and sustainability metrics that extend beyond energy efficiency, such as carbon emissions. The workshop fosters dialogue between Tier-0/1 and Tier-2 centers to help adapt Tier-0/1 innovations for more constrained budgets. While investment priorities differ across tiers, challenges in software and applications remain universal, serving as a unifying link. It targets financial and technical solutions applicable to HPC clusters, data centers, and cloud infrastructures worldwide.
Keynote Speaker
———————————-
Dr. John L. Gustafson – Arizona State University and Vq Research
* Title: Every Bit Counts: Posit Computing for Energy-Efficient HPC and AI
* Abstract: Both the HPC and AI communities are increasingly adopting the posit arithmetic approach introduced by Dr. John L. Gustafson in 2017. By rethinking how numbers are represented and computed, posits offer a promising pathway toward energy-efficient high-performance computing, aligning with the goals of sustainable exascale systems. Traditional technical computing relies on numerical representations invented over a century ago (1914) and ad hoc number formats from nearly 50 years ago, designed for an era when transistors were expensive but electrical power was abundant. Persisting with these antiquated formats into the exascale era wastes power, energy, storage, bandwidth, and programmer effort. Unlike legacy floating-point formats, posits are mathematically closed, produce reproducible results across platforms, and dynamically allocate precision based on magnitude. This allows computers to save time, storage, energy, and power by encoding more information per bit and avoiding repeated computations or error corrections. In this keynote, Dr. Gustafson will present recent developments in posit arithmetic. By providing enhanced precision and dynamic range with fewer bits, posits enable more accurate calculations while reducing energy and computational overhead. Posits also handle edge cases robustly, minimizing wasted cycles and memory accesses. The talk will explore theoretical foundations, practical implementation challenges, and the potential of posits to drive energy-efficient computation, offering a fresh design that delivers better answers with lower energy consumption.
* BIO: Dr. John L. Gustafson is a renowned computer scientist and pioneer in high-performance computing. He is best known for formulating Gustafson’s Law, the foundational alternative to Amdahl’s Law, which transformed the world’s understanding of massively parallel scalability and earned him the inaugural Gordon Bell Prize in 1988. Over the course of his career, he has led groundbreaking research at Sandia National Laboratories, where he introduced one of the world’s first commercial computer clusters and founded the Scalable Computing Laboratory. In industry, he has held senior and executive roles at Intel (Director and Lab Leader for energy-efficient and extreme-scale computing), AMD (Chief Graphics Product Architect and Senior Fellow), ClearSpeed Technology (CTO), and Massively Parallel Technologies (CEO). He created the unum and posit number systems, alternatives to IEEE floating-point that improve accuracy and energy efficiency. He has authored influential books (e.g., Every Bit Counts) and numerous highly cited papers on parallel performance, computer arithmetic, and HPC productivity. He holds applied mathematics degrees from Caltech and Iowa State University. Across academia and industry, Gustafson has been a visiting scholar, educator, and keynote speaker, and currently serves as Visiting Scholar at Arizona State University and Chief Scientist/Co-founder of Vq Research.
Topics of Interest
———————————-
The workshop aims to benefit the broader community by sharing use cases, lessons learned, and best practices through descriptive papers. We solicit papers which encompass the following topics of interest but are not limited to:
* Energy-aware software and application optimization
* Programming models, compilers, and tools for energy-efficient computing
* Energy-efficient hardware architectures and design practices
* Energy-aware resource management, and power-steering runtimes
* Operating system and network techniques for power and thermal control
* Tools/frameworks for energy monitoring, instrumentation and analysis
* Processor and system energy models including behavioral insights
* Cluster-wide energy benchmarking and regression analysis
* Comparative benchmarking of node architectures and memory systems
* Analysis of long-term energy degradation in CPUs and GPUs
* Renewable energy sources for HPC systems
* Energy-efficient procurement frameworks and lifecycle cost analysis
* Operational analytics and control for real-time power adaptation
* Integration, energy/performance profiling and optimization of AI workloads
* Emerging trends and challenges in HPC/AI energy consumption
Paper format and submission
———————————-
Papers should be either short (work-in-progress, 6 pages) or regular (12 pages), including references and appendices, with an option for two additional pages after review to address reviewer feedback. Submitted papers must be original and not previously published or under review elsewhere. Content generated by AI tools must be clearly and thoroughly described, and AI systems cannot be credited as authors. Each submission will undergo a minimum of three single-blind peer reviews. Papers must be submitted online via the ISC Linklings system in PDF format, using the Springer LNCS template.
EESP Paper Proceedings
———————————-
The accepted papers will be published as part of the ISC proceedings in Springer’s Lecture Notes in Computer Science (LNCS) series.
EESP Best Paper Award
———————————-
As in the previous edition, the workshop program and organizing committee will select one paper for the Best Paper Award. The selection will be based on the established review criteria: originality, technical soundness, potential impact, significance, and quality of presentation. The Best Paper Award certificate will be presented in person during the workshop.
EESP Journal Special Issue
———————————-
The authors of the highest-quality accepted EESP papers, as selected by the Program and Organizing Committee of the workshop, will be invited to submit extended versions of their work to a special issue of the International Journal of High Performance Computing Applications.
We look forward to your contributions and participation in the EESP workshop in Hamburg in June 2026!
Sincerely,
EESP General Chair
———————————-
Ayesha Afzal – Erlangen National High Performance Computing Center (NHR@FAU), Germany
EESP Program Co-Chairs
———————————-
Natalie Bates – Energy Efficient HPC Working Group (EE HPC WG), USA
Hatem Ltaief – King Abdullah University of Science and Technology (KAUST), Saudi Arabia
Bronis R. de Supinski – Lawrence Livermore National Laboratory (LLNL), USA
EESP Program Committee
———————————-
Ahmad Abdelfattah – University of Tennessee, USA
Ashiq Anjum – University of Leicester, UK
Mauricio Araya-Polo – TotalEnergies E&P R&T, USA
Paolo Bientinesi – Umeå University, Sweden
Patrick Carribault – CEA, France
Biagio Cosenza – University of Salerno, Italy
Stefano Corda – Huawei Technologies Switzerland
Fabien Chaix – ICS-FORTH, Greece
Markus Diesmann – Forschungszentrum Jülich, Germany
Jens Domke – RIKEN Center for Computational Science, Japan
Frédéric Desprez – INRIA, France
Aditya Deshpande – Samsung Semiconductor, USA
Martin Frank – Karlsruhe Institute of Technology, Germany
Dietmar Fey – Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany
Ryan E. Grant – Queen’s University, Canada
William F Godoy – Oak Ridge National Laboratory, USA
Diana Goehringer – Technische Universität Dresden, Germany
Gabriel Hautreux – National Computer Center for Higher Education (CINES), France
Bilel Hadri – KAUST Supercomputing Lab, Saudi Arabia
Daniel Hackenberg – Technische Universität Dresden, Germany
Toshihiro Hanawa – The University of Tokyo, Japan
Georg Hager – Erlangen National High Performance Computing Center, Germany
Aleksandar Ilic – University of Lisbon, Portugal
Zoltan Kiss – Digital Government Development and Project Management Ltd. (DKF), Hungary
Jacques-Charles Lafoucriere – CEA, France
Erwin Laure – Max Planck Computing and Data Facility, Germany
Arthur F. Lorenzon – UFRGS, Brazil
Steven Martin – Hewlett Packard Enterprise, USA
Matthias Maiterth – Oak Ridge National Laboratory, USA
Rob Van Nieuwpoort – Leiden University, Netherlands
Michael Ott – Leibniz Supercomputing Centre, Germany
Radu Prodan – University of Innsbruck, Austria
Maria Patrou – Oak Ridge National Laboratory, USA
Dirk Pleiter – University of Groningen, Netherlands
Markus Rampp – Max Planck Computing and Data Facility, Germany
István Z. Reguly – Pázmány Péter Catholic University, Hungary
Filippo Spiga – NVIDIA, UK
Robert Schöne – Technische Universität Dresden, Germany
Fumiyoshi Shoji – RIKEN Center for Computational Science, Japan
Andy Turner – University of Leeds, England
Ondřej Vysocký – IT4Innovations National Supercomputing Center, Czech Republic
Xingfu Wu – Argonne National Laboratory, USA
Josef Weidendorfer – Technische Universität München, Germany
Kazutomo Yoshii – Argonne National Laboratory, USA
Aleš Zamuda – University of Maribor, Slovenia
Zhengji Zhao – Lawrence Berkeley National Laboratory, USA
Collaborators
———————————-
Erlangen National High Performance Computing Center (NHR@FAU)
Energy Efficient HPC Working Group (EE HPC WG)
Contact
———————————-
Please contact workshop General Chair Ayesha Afzal for any inquiries: ayesha.afzal@fau.de.