CALL FOR PARTICIPATION

IEEE Symposium on Low-Power and High-Speed Chips ‘COOL Chips 29’: <https://www.coolchips.org/>

Registration page: <https://www.coolchips.org/2026/registration/>

=== Dates and Location ===

– April 15-17, 2026

– Tokyo, Japan

=== Advance Program ===

[Wednesday, April 15]

** Keynote Presentations **

– “N3XT 1,000X: The Future of Hardware Technologies for Computing”,

 Subhasish Mitra (Stanford University)

 This talk proposes N3XT 3D, a new chip architecture based on dense 3D integration, targeting 1,000X improvements in system-level Energy-Delay-Product to overcome the memory, miniaturization, and reliability walls.

– “Comprehensive Approach to Realizing Practical Quantum Computing”,

 Shintaro Sato (Fujitsu)

– “DNA-X: A Programmable Dynamic Neural Accelerator for Scalable, Energy-Proportional AI Systems”,

 Sakyasingha Dasgupta (EdgeCortix)

 This talk introduces the DNA-X architecture combining dynamically controlled dataflow execution with programmable matrix engines, and discusses how it achieves both energy efficiency and performance across CNNs, transformers, and generative AI workloads.

[Thursday, April 16]

** Keynote Presentation **

– “Memory Subsystems for AI: Bridging Performance and Energy from Cloud to Edge”,

 Dongkyun Kim (SK hynix)

 This talk examines memory bottlenecks in AI systems from server to edge, and discusses the evolution of memory subsystems including high-bandwidth memory, Processing-in-Memory (PIM), and Compute-in-Memory (CIM).

** Special Sessions (invited lectures) **

– “Hardware Intellectual Property (IP) Protection through Integrated Circuit (IC) Redaction: Challenges & Solutions”,

 Yiorgos Makris (University of California, San Diego)

 This lecture addresses IP theft risks in fabless semiconductor manufacturing, and introduces design redaction techniques that restore sensitive circuit portions through post-manufacturing programming, along with the TRAP fabric for robust IP protection.

– “RowHammer, RowPress and Beyond: Can We Be Free of Bitflips Soon?”,

 Onur Mutlu (ETH Zurich)

 This lecture provides an overview of cutting-edge DRAM read disturbance research including RowHammer, RowPress, and ColumnDisturb, discusses their effects on DDR4 and HBM chips, and describes approaches to memory robustness.

** Panel Discussion **

 Topic: “Building the Classical-Quantum Stack: What Do We Need from Each Other?”

 Organizer/Moderator: Takefumi Miyoshi (QuEL, Inc./The Univ. of Osaka/e-trees.Japan, Inc.)

 Panelists: Ikko Hamamura (NVIDIA)

            Takafumi Miyanaga (QIQB, The Univ. of Osaka)

            Mitsuhisa Sato (RIKEN R-CCS/Juntendo Univ.)

            Yasunari Suzuki (RQC, RIKEN)

 This panel will discuss architectures of classical-quantum computing systems across multiple layers (quantum processors, control electronics, software, etc.) and identify key bottlenecks in system integration.

[Friday, April 17]

** Keynote Presentation **

– “Multi-Modal Photonic Computing for Real-Time Ultra-efficient Inference”,

 Eric Blow (NEC Lab America)

 This talk discusses the feasibility of ultra-high-throughput, low-latency, and energy-efficient inference through analog photonic computing, and presents architectures and co-design approaches using silicon photonics.

For your registration and for detailed and up-to-date information, please visit <https://www.coolchips.org/>

Registration page: <https://www.coolchips.org/2026/registration/>

 (As of March 24, 2026)

CFP – IEEE Symposium on Low-Power and High-Speed Chips and Systems COOL Chips 29