================================================================== HiPEAC – 2020 Workshop on Accelerated Machine Learning (AccML) Co-located with the HiPEAC 2020 Conference (https://www.hipeac.net/2020/bologna/) January 20, 2020 Bologna, Italy ================================================================== ————————————————————————- CALL FOR CONTRIBUTIONS ————————————————————————- In the last 5 years, the remarkable performance achieved
Call for Papers: IEEE Micro Special Issue on Agile and Open-Source Hardware
As the benefits of traditional technology scaling, like Dennard Scaling and Moore’s Law, slow significantly, computer architecture is poised to enter a golden age of innovation. Domain-specific architectures (DSA) are a promising solution to continue improving computing performance, while maintaining
2019 MICRO Test of Time Award: Call for Nominations
The MICRO Test of Time (ToT) Award Committee is soliciting nominations for the fifth MICRO ToT Award to be given at the International Symposium on Microarchitecture in October 2019, to be held in Columbus, Ohio. This award recognizes the most
ICASSP 2020: Signal Processing, Machine Learning and Data Science: Design and Implementation
The IEEE Design and Implementation of Signal Processing Systems (DISPS) community would be delighted to welcome your contribution to the DISPS track at ICASSP 2020 in Barcelona in May 2020. See call for papers below. Call For Papers Signal Processing, Machine Learning
CGO 2020 – Call for Workshops and Tutorials
Call for Workshops and Tutorials CGO 2020 will host co-located workshops and tutorials on Saturday and Sunday (2/22 – 2/23/2020) before the main conference. This is your event’s chance to take advantage of the interdisciplinary audience of CGO, HPCA, and
IEEE Computer Architecture Letters (June-July 2019)
The IEEE Computer Architecture Letters Editorial Board is pleased to highlight the recent publication of the following letters: Modeling Emerging Memory-Divergent GPU Applications by Lu Wang, Magnus Jahre, Almutaz Adileh, Zhiying Wang, Lieven Eeckhout https://ieeexplore.ieee.org/document/8738813 SMT-SA: Simultaneous Multithreading in
EuroP4 – The 2nd P4 Workshop in Europe (Deadline: 22 July)
The EuroP4 deadline was extended to July 22 (matching the ANCS conference deadline where the workshop is co-located). ================================ EuroP4 – The 2nd P4 Workshop in Europe An ANCS 2019 Workshop presented by the P4 Language Consortium September 23rd,
Twenty-Eighth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2020)
Call for Papers: FPGA 2020 Twenty-Eighth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays http://www.isfpga.org February 24-26, 2020 Embassy Suites by Hilton Monterey Bay Seaside 1441 Canyon Del Rey, Seaside, California, 93955, USA Abstract Submission Deadline: September 9,
[CFP] NoCArc 2019 – 12th International Workshop on Network on Chip Architectures
NoCArc 2019 http://www.nocarc.org 12th International Workshop on Network on Chip Architectures October 12-13, 2019 – Columbus, Ohio, USA (To be held in conjunction with IEEE/ACM MICRO-52) G E N E R A L I N F O R M
New Book: Cache Replacement Policies
Cache Replacement Policies Akanksha Jain, The University of Texas at Austin Calvin Lin, The University of Texas at Austin Paperback ISBN: 9781681735764 eBook ISBN: 9781681735771 Hardcover ISBN: 9781681735788 June 2019, 87 pages http://www.morganclaypoolpublishers.com/catalog_Orig/product_info.php?products_id=1427 Abstract: This book summarizes the