IEEE Transactions on Computers seeks original manuscripts
for a special issue/section on Hardware Acceleration of Machine Learning
scheduled to appear in June 2022. The
confluence of the end of Dennard scaling and the demand for ML processing have
given rise to an arms race for achieving the highest throughput, minimal
latency, and lowest power consumption. In this environment, special-purpose ML
hardware accelerators have skyrocketed in popularity. This special issue aims to describe the state
of the art in developing, optimizing, programming, and deploying hardware
accelerator technologies for machine learning.
We are seeking papers that demonstrate performance and power efficiency
levels enabling the ML revolution today and in the foreseeable future.
Topics of interest
to this special issue include, but are not limited to:
● Hardware accelerator architectures and methodologies for ML
inference and training at chip, wafer, system, and datacenter scale
● Specialized hardware acceleration tailored for CNNs,
Transformers, Recommender Systems, Reinforcement Learning, and other leading
Deep Neural Network algorithms
● Machine learning acceleration on GPUs, FPGAs, CGRAs, and
ASICs, including extensions of these hardware platforms with features specific
to ML workloads
● Performance characterization and analysis of ML workloads
running on hardware accelerators
● Compilers and ISAs for machine learning accelerators
● Reduced precision, bit-serial evaluation, structured and
unstructured sparsity support
● Approximate, error-aware, and error-resilient ML accelerators
and development methodologies
● Joint co-optimization of ML algorithms and accelerator
architecture
● Machine learning accelerator deployment, multi-tenancy, and
virtualization
● On-chip and off-chip networks for ML accelerators, including
photonics and other forward-looking interconnection technologies
● ML acceleration in the cloud and at the edge, including
integration into end-user devices
Submitted papers must include new significant research-based technical contributions in the scope of the journal. Papers under review elsewhere are not acceptable for submission. Extended versions of published conference papers (to be included as part of the submission together with a summary of differences) are welcome, but there must have at least 30% new impacting technical/scientific material in the submitted journal version and there should be less than 50% verbatim similarity level as reported by a tool (such as CrossRef). Guidelines concerning the submission process and LaTeX and Word templates can be found at https://www.computer.org/csdl/journal/tc/write-for-us/15066?title=AuthorInformation&periodical=IEEE Transactions on Computers. While submitting through ScholarOne, at https://mc.manuscriptcentral.com/tc-cs, please select this special issue/section
option. As per TC policies, only full-length papers (12 pages) can be submitted to special issues/sections and each author’s bio should not exceed 150 words.
Please note the following important dates:
• Submission Deadline: January 13, 2022
• Reviews Completed: February 24, 2022
• Major Revisions Due: March 16, 2022
• Reviews of Revisions Completed: April 12, 2022
• Notification of Final Acceptance: April 22, 2022
• Publication Materials for Final Manuscripts Due: May 4, 2022
• Publication: June 2022
Guest Editors:
Michael Ferdman, Stony Brook University
Jorge Albericio, NVIDIA
Tushar Krishna, Georgia Tech
Co-ordinating Topical
Editor:
Peter Milder, Stony Brook University