The 33rd International Workshop on Logic & Synthesis
(IWLS) Call for Papers
Website: https://www.iwls.org/
Submission site: https://easychair.org/conferences/?conf=iwls2024
June 6–7, 2024, ETH Zurich, Zurich, Switzerland
The International Workshop on Logic and Synthesis is the
premier forum for research in synthesis, optimization, and verification of
integrated circuits and systems. Research on logic synthesis for emerging
technologies and for novel computing platforms, such as nanoscale systems and
biological systems, is also strongly encouraged. The workshop encourages the
early dissemination of ideas and results. The workshop accepts complete papers
highlighting important new problems in the early stages of development, without
providing complete solutions. The emphasis is on novelty and intellectual
rigor.
Topics of interest include but are not limited to: hardware
synthesis and optimization; software synthesis; hardware/software co-synthesis;
power and timing analysis; testing, validation, and verification; synthesis for
reconfigurable architectures; hardware compilation for domain-specific
languages; and design experiences. Submissions on modeling, analysis, and
synthesis for emerging technologies and platforms are particularly encouraged.
The workshop format includes paper presentations, invited
talks, social lunch and dinner gatherings, and recreational activities.
Important Dates:
Paper abstract submission: April 5, 2024
Submission deadline for papers: April 12, 2024
Notification of acceptance: May 6, 2024
Final version due: May 31, 2024
Submission link: https://easychair.org/conferences/?conf=iwls2024
Submission Instructions:
Only complete papers with original and previously
unpublished material are permitted. Submissions must be no longer than 8 pages
(reference excluded), double column, 10-point font (we recommend using the ACM template
or the
IEEE template, but not necessary). Accepted papers are distributed only to
IWLS participants. Submissions are made electronically through EasyChair.
Double-blind policy: IWLS uses a double-blind reviewing
system. Manuscripts must not identify authors or their affiliations; those that
do will not be considered.
Keynotes:
· Can AI design and verify your design? Ziyad Hanna, Cadence Design Systems, Israel.
· Symmetric is better: can we exploit regularities in logic synthesis? Valentina Ciriani, University of Milano, Italy.
IWLS 2024 Programming Contest:
The goal of this year’s contest is to synthesize the
smallest possible correct circuits for a suite of Boolean functions
representative of hardware designs, including random logic, arithmetic
operators, and typical functionality of artificial neurons in machine learning.
The contest submission deadline is May 31, 2024.
This year’s programming contest prizes:1st place, $800; 2nd
place, $400; 3rd place, $300. For more details, please check the contest
description on the workshop
website.
Organizing Committee:
General Chair: Lana Josipović, ETH Zurich
Program Committee Chairs: Giulia Meuli / Winston Haaswijk, Synopsys / Cadence
Program Contest Chairs: Alan Mishchenko / Yukio Miyasaka, UC Berkeley
Special Session Chair: Eleonora Testa, Synopsys
Finance Chair: Cunxi Yu, University of Maryland
Proceedings Chair: Marcel Walter, TU Munich
Publicity Chairs: Siang-Yun Lee / Jiahui Xu, EPFL / ETH Zurich
Local Arrangements Chair: Carmine Rizzi, ETH Zurich
Technical Program Committee:
Luca Amaru, Synopsys
Anna Bernasconi, Università di Pisa
Lei Chen, Huawei Noah’s Ark Lab
Zhufei Chu, Ningbo University
Valentina Ciriani, Università degli Studi di Milano
Petr Fišer, CTU
Winston Haaswijk, Cadence Design Systems
Jie-Hong Roland Jiang, National Taiwan University
Lana Josipović, ETH Zurich
Attila Jurecska, Siemens EDA
Victor Kravets, IBM
Siang-Yun Lee, EPFL
Giulia Meuli, Synopsys
Alan Mishchenko, UC Berkeley
Walter Lau Neto, Synopsys
Augusto Neutzling, Cadence Design Systems
Stefan Nikolić, EPFL
Weikang Qian, Shanghai Jiao Tong University
Andre Reis, UFRGS
Tsutomu Sasao, Meiji University
Herman Schmit, Google
Bruno Schmitt, Nvidia
Mathias Soeken, Microsoft
Eleonora Testa, Synopsys
Tiziano Villa, Università degli Studi di Verona
Robert Wille, TU Munich & SCCH GmbH
Xiaoqing Xu, X, the moonshot factory
Cunxi Yu, University of Maryland